Merge "Sync L3 headers in sc-dev" into sc-dev am: 5af95f48ed

Original change: https://googleplex-android-review.googlesource.com/c/platform/vendor/widevine/+/14669194

Change-Id: I29f7456d0afe12b2a4f578e290dde5b2c6643c0c

libwvdrmengine/level3/include/clear_cache_function.h

@@ -1,6 +1,8 @@
 #include <errno.h>
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
 
 #include <linux/membarrier.h>
 #include <sys/syscall.h>
@@ -79,9 +81,11 @@ void clear_cache_function(void *page, size_t len) {
   __builtin___clear_cache(begin, end);
 #  endif
 #endif
+
 #ifndef USED_BUILTIN_CLEAR_CACHE
-#if __arm__
+#  if defined(__arm__)
 #    pragma message "(info): clear_cache_function is using arm asm."
+#      define USED_ARM_ASM_CLEAR_CACHE
   // ARM Cache Flush System Call:
   char *begin = static_cast<char *>(page);
   char *end = begin + len;
@@ -97,6 +101,27 @@ void clear_cache_function(void *page, size_t len) {
       :
       : "r"(begin), "r"(end), "r"(syscall)
       : "r0", "r1", "r7");
+#  elif defined(__aarch64__)
+#    pragma message "(info): clear_cache_function is using arm64 asm."
+#      define USED_ARM_ASM_CLEAR_CACHE
+  uint64_t begin = static_cast<uint64_t>(reinterpret_cast<uintptr_t>(page));
+  uint64_t end = begin + len;
+  register uint64_t ctr_el0;
+  __asm __volatile("mrs %0, ctr_el0" : "=r"(ctr_el0));
+  // register CTR_EL0 [19:16] contains dcache line size
+  const size_t dcache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
+  register uint64_t addr;
+  for (addr = begin; addr < end; addr += dcache_line_size) {
+    __asm __volatile("dc cvau, %0" ::"r"(addr));
+  }
+  __asm __volatile("dsb ish");
+  //  register CTR_EL0 [3:0] contains icache line size
+  const size_t icache_line_size = 4 << (ctr_el0 & 0xF);
+  for (addr = begin; addr < end; addr += icache_line_size) {
+    __asm __volatile("ic ivau, %0" ::"r"(addr));
+  }
+  __asm __volatile("dsb ish");
+  __asm __volatile("isb sy");
 #  elif __mips__
 #    pragma message "(info): clear_cache_function is using mips asm."
   int result = syscall(__NR_cacheflush, page, len, ICACHE);
@@ -112,6 +137,9 @@ void clear_cache_function(void *page, size_t len) {
 #endif
 
 #if defined(__arm__) || defined(__aarch64__)
+#  if !defined(USED_BUILTIN_CLEAR_CACHE) && !defined(USED_ARM_ASM_CLEAR_CACHE)
+#    error "clear cache function unavailable, which is required for ARM."
+#  endif
 #  pragma message "(info): inserting membarrier_function calls."
   membarrier_function(MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE);
   membarrier_function(MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE);

libwvdrmengine/level3/include/level3_file_system_android.h

@@ -1,6 +1,6 @@
 // Copyright 2018 Google LLC. All Rights Reserved. This file and proprietary
-// source code may only be used and distributed under the Widevine Master
+// source code may only be used and distributed under the Widevine License
-// License Agreement.
+// Agreement.
 
 /*********************************************************************
  * level3_file_system_android.h